Electronics

⭐⭐⭐⭐⭐ #IEEE #PRC #YP Puerto Rico and Caribbean (Virtual Summit 2020): Clasificación de señales de Electroencefalografía (#EEG) con Redes Neuronales #NN en #FPGA from Victor Asanza ➡️ #EEG #Classification #HumanMachineInterface #BCI #BrainComputerInterface #Emotiv ✅ #DigitalSystems #DigitalElectronic #DigitalCircuits #HDL #VHDL #FPGA Introduction Asanza, V., Pelaez, E., & Loayza, F. (2017, October). Supervised pattern recognition techniques for detecting motor intention of lower limbs in subjects with cerebral palsy. In Ecuador Technical Chapters Meeting (ETCM), 2017 IEEE (pp. 1-5). IEEE. Asanza, V., Pelaez, E., & Loayza, F. (2017, October). EEG signal clustering for motor and imaginary motor tasks on hands and feet. In Ecuador Technical Chapters Meeting (ETCM), 2017 IEEE (pp. 1-5). IEEE. Asanza, V., Ochoa, K., Sacarelo, C., Salazar, C., Loayza, F., Vaca, C., & Peláez, E. (2016, October). Clustering of EEG occipital signals using k-means. In Ecuador Technical Chapters

⭐⭐⭐⭐⭐ #PROTEUS #PCB DESIGN (2020 PAO2) from Victor Asanza ➡️ #EmbeddedSystems #ARM #Python #CProgrammingLanguage #AVR #Esp32 # Espressif #IoT #CyberPhysicalSystem #SensorNetwork #WirelessSensorNetwork #Processor #Arduino #RaspberryPi #FreeRTOS ⭐  https://github.com/vasanza/EmbeddedSystems ✅ Ejemplo 1: End Device based on #Arduino ✅ Ejemplo 2: #ATMEGA328P #Proteus Schematic #GRABCAD Proteus #PCB Layout Proteus 3D Visualizer Video Ejemplo2 Leer temas relacionados: ✅   2020 PAO2: Proyectos Propuestos ✅  2020 PAO2: Electronic Prototype Development ✅  Instalación de  #ALTIUM #CircuitMaker y especificaciones del módulo #ESP32 ✅    Primeros pasos usando #Altium Designer (Esquemáticos) ✅    Primeros pasos usando Altium Designer (PCB) ✅    Diseño Modular usando Altium Designer

⭐⭐⭐⭐⭐ DESARROLLO DE PROTOTIPOS ELECTRONICOS, PROYECTOS PROPUESTOS (2020 PAO2) from Victor Asanza ✅ Software #Altium #CircuitMaker #AltiumDesigner ☑️ #ElectronicPrototypesDesign #PrototipadoElectronico #PCB #HardwareDesign #Hardware #AdeltaTechnologies #OpenHardware #OpenSourceHardware https://github.com/Open-source-hardware Ubicación, Rastreo y Geocercas para Vehículos / Ganado, Indoor positioning, Red de Boyas para detección de tsunamis. Salud Estructural. Consumo de Energía Responsable. Red de Sensores en Agricultura y Acuicultura. ☑️ #Altium #CircuitMaker ☑️ #ESP32 Estacion Meteorologica (EM) ✅  Ejemplo Luego de tener claro los requerimientos, se recomienda usar abstracciones tanto a nivel de Hw y Sw. Estas abstracciones deberán en lo posible estar relacionadas de forma Jerárquica. Jerarquías de comportamiento: Los estados, eventos y señales de salida son ejemplos de tales objetos. Jerarquías estructurales: las jerarquías estructurales describen cómo los sistemas están compues

⭐⭐⭐⭐⭐ Behavioral Signal Processing with Machine Learning based on #FPGA from Victor Asanza ➡️ #DigitalSystems #DigitalElectronic #DigitalCircuits #HDL #VHDL #FPGA ➡️ ICCIS2020: 1st International Conference on Systems and Information Sciences ⭐  Read full paper:  https://doi.org/10.1007/978-3-030-59194-6_17 ✅  Read Proceedings:  https://link.springer.com/book/10.1007/978-3-030-59194-6 When using this resource, please cite the original publication: Asanza V., Sanchez G., Cajo R., Peláez E. (2021) Behavioral Signal Processing with Machine Learning Based on FPGA. In: Botto-Tobar M., Zamora W., Larrea Plúa J., Bazurto Roldan J., Santamaría Philco A. (eds) Systems and Information Sciences. ICCIS 2020. Advances in Intelligent Systems and Computing, vol 1273. Springer, Cham. https://doi.org/10.1007/978-3-030-59194-6_17 ✅ Video of the talk: ✅ Published in:  https://link.springer.com/chapter/10.1007%2F978-3-030-59194-6_17 ✅ Paper content: Introduction: Sedentary lifestyle. 21-25% of breas

⭐⭐⭐⭐⭐ Monitoring of system memory usage embedded in #FPGA from Victor Asanza ➡️ #DigitalSystems #DigitalElectronic #DigitalCircuits #HDL #VHDL #FPGA ➡️  2020 International Conference on Applied Electronics (AE) ⭐  Read full paper:  https://ieeexplore.ieee.org/abstract/document/9232863 ⭐  Source code repository:  https://github.com/VHDL-Digital-Systems When using this resource, please cite the original publication: V. A. Armijos, N. S. Chan, R. Saquicela and L. M. Lopez, "Monitoring of system memory usage embedded in FPGA," 2020 International Conference on Applied Electronics (AE), 2020, pp. 1-4, doi: 10.23919/AE49394.2020.9232863. ✅ Conference content: Field Programmable Gate Array #FPGA System on Chip #SoC #Nios_II_Processor Hard Processor System #HPS Advanced RISC Machine #ARM Logical bridges Share physical resources Related Work: Renovell et Al., testing #RAM modules in #FPGA, Focus on functional tests RAM of the FPGA. Wei et Al., RAM memory monitoring, Embedded Syst

⭐⭐⭐⭐⭐ Implementation Of Automated System For The Reservoir 66 of the Irrigation System Chambo Guano from Victor Asanza ➡️ #EmbeddedSystems #PLC #AutomatedSystem #ControlSystems #IrrigationSystem  #IoT #CyberPhysicalSystem #SensorNetwork #WirelessSensorNetwork ➡️  APPEL 2020:  International Conference on Applied Electronics, AE #APPEL2020 ⭐  Read full paper:  https://ieeexplore.ieee.org/abstract/document/9232888 ✅ Read Proceedings:  https://ieeexplore.ieee.org/xpl/conhome/9223094/proceeding ⭐  Source code repository:  https://github.com/Embedded-Systems-Architecture When using this resource, please cite the original publication: C. Angel Silva, V. Asanza, N. Sánchez and J. Arias, "Implementation Of Automated System For The Reservoir 66 of the Irrigation System Chambo Guano," 2020 International Conference on Applied Electronics (AE), 2020, pp. 1-6, doi: 10.23919/AE49394.2020.9232888. This paper presents the control and monitoring of an automated system that is being imple