▷ Charla #FIEC: Monitoring of system memory usage embedded in #FPGA

⭐⭐⭐⭐⭐ CHARLA FIEC: Monitoring of system memory usage embedded in #FPGA from Victor Asanza

• ➡️ #DigitalSystems #DigitalElectronic #DigitalCircuits #HDL #VHDL #FPGA
• ➡️ 2020 International Conference on Applied Electronics (AE)
• ⭐ Read full paper: https://ieeexplore.ieee.org/abstract/document/9232863

• When using this resource, please cite the original publication:

• V. A. Armijos, N. S. Chan, R. Saquicela and L. M. Lopez, "Monitoring of system memory usage embedded in FPGA," 2020 International Conference on Applied Electronics (AE), 2020, pp. 1-4, doi: 10.23919/AE49394.2020.9232863.

• ✅ Video of the talk:

• Introduction:

• Related Work:

• Methodology:

• Results:

• Discussion and Conclusions:

• More FPGA projects:
• Asanza V., Sanchez G., Cajo R., Peláez E. (2021) Behavioral Signal Processing with Machine Learning Based on FPGA. In: Botto-Tobar M., Zamora W., Larrea Plúa J., Bazurto Roldan J., Santamaría Philco A. (eds) Systems and Information Sciences. ICCIS 2020. Advances in Intelligent Systems and Computing, vol 1273. Springer, Cham. https://doi.org/10.1007/978-3-030-59194-6_17
• Asanza, A. Constantine, S. Valarezo and E. Peláez, "Implementation of a Classification System of EEG Signals Based on FPGA," 2020 Seventh International Conference on eDemocracy & eGovernment (ICEDEG), Buenos Aires, Argentina, 2020, pp. 87-92, doi: 10.1109/ICEDEG48599.2020.9096752.
• C. Cedeño Z., J. Cordova-Garcia, V. Asanza A., R. Ponguillo and L. Muñoz M., "k-NN-Based EMG Recognition for Gestures Communication with Limited Hardware Resources," 2019 IEEE SmartWorld, Ubiquitous Intelligence & Computing, Advanced & Trusted Computing, Scalable Computing & Communications, Cloud & Big Data Computing, Internet of People and Smart City Innovation (SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI), Leicester, United Kingdom, 2019, pp. 812-817.

• ttp://www.innovatefpga.com/cgi-bin/innovate/teams.pl?Id=AS027

• State of the art:
• Mittal, S. (2020). A survey of FPGA-based accelerators for convolutional neural networks. Neural computing and applications, 1-31.

• Questions:

• Published in:
• ✅ https://ieeexplore.ieee.org/abstract/document/9232863

• Read related topics:
• ➡️ For more information about #FPGA, check the link: DIGITAL SYSTEMS 1, DIGITAL SYSTEMS 2, DIGITAL SYSTEMS DESIGN and VHDL
• https://vasanza.blogspot.com/p/shared-material.html
• ➡️ For more information about #Hardware #Design, check the link: ELECTRONIC PROTOTYPES DESIGN
• https://vasanza.blogspot.com/p/shared-material.html
• ✅ Implementation of a Classification System of #EEG Signals Based on #FPGA
• ✅ Artificial Neural Network based #EMG recognition for gesture communication (#InnovateFPGA)
• ✅ Projects Digital Systems Design #FPGA
• ✅ 2020 PAO1: Proyectos Propuestos
• ✅ End Device #Arduino #FreeRTOS
• ✅ End Device + Coordinator #Raspberry Pi #Python